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| TC826 Analog-to-Digital Converter with Bar Graph Display Output Features * * * * * * * * * * * * * * * * Bipolar A/D Conversion 2.5% Resolution Direct LCD Display Drive `Thermometer' BAR or DOT Display 40 Data Segments Plus Zero Over Range Plus Polarity Indication Precision On-Chip Reference: 35ppm/C Differential Analog Input Low Input Leakage: 10pA Display Flashes on Over Range Display HOLD Mode Auto-Zero Cycle Eliminates Zero Adjust Potentiometer 9V Battery Operation Low Power Consumption: 1.1mW 20mV to 2.0V Full Scale Operation Non-Multiplexed LCD Drive for Maximum Viewing Angle General Description In many applications, a graphical display is preferred over a digital display. Knowing a process or system operates, for example, within design limits is more valuable than a direct system variable read out. A bar or moving dot display supplies information precisely without requiring further interpretation by the viewer. The TC826 is a complete analog-to-digital converter with direct liquid crystal (LCD) display drive. The 40 LCD data segments plus zero driver give a 2.5% resolution bar display. Full scale differential input voltage range extends from 20mV to 2V. The TC826 sensitivity is 500V. A low drift 35ppm/C internal reference, LCD backplane oscillator and driver, input polarity LCD driver, and over range LCD driver make designs simple and low cost. The CMOS design required only 125A from a 9V battery. In +5V systems, a TC7660 DC to DC converter can supply the -5V supply. The differential analog input leakage is a low 10pA. Two display formats are possible. The BAR mode display is like a `thermometer' scale. The LCD segment driver that equals the input, plus all below it are on. The DOT mode activates only the segment equal to the input. In either mode, the polarity signal is active for negative input signals. An over range input signal causes the display to flash and activates the over range annunciator. A HOLD mode can be selected that freezes the display and prevents updating. The dual slope integrating conversion method with auto-zero phase maximizes noise immunity and eliminates zero scale adjustment potentiometers. Zero scale drift is a low 5V/C. Conversion rate is typically 5 per second and is adjustable by a single external resistor. A compact, 0.5" square, flat package minimizes PC board area. The high pin count LSI package makes multiplexed LCD displays unnecessary. Low cost, direct drive LCD displays offer the widest viewing angle and are readily available. A standard display is available now for TC826 prototyping work. Device Selection Table Part Number TC826CBU Package 64-Pin PQFP Temperature Range 0C to +70C 2002 Microchip Technology Inc. DS21477B-page 1 (c) TC826 Package Type 64-Pin PQFP BAR/DOT BAR 40 BAR 39 BAR 38 BAR 37 BAR 36 BAR 35 BAR 34 BAR 33 BAR 32 50 64 NC ANALOG COMMON +IN -IN REF IN CREF+ CREFVDD VBUF CAZ VINT VSS OSC1 OSC2 BP BAR 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 63 62 61 60 59 58 57 56 55 54 53 52 51 49 48 47 46 45 44 43 42 NC BAR 30 BAR 29 BAR 28 BAR 27 BAR 26 BAR 25 BAR 24 BAR 23 BAR 22 BAR 21 BAR 20 BAR 19 BAR 18 BAR 17 BAR 16 TC826CBU BAR 31 41 40 39 38 37 36 35 34 33 32 HOLD TEST POL21 18 19 20 22 OR NC 23 24 25 26 27 28 29 30 31 BAR 10 BAR 11 BAR 12 BAR 13 BAR 14 Typical Application CINT RINT 1M 9 VBUF BAR/DOT CAZ 10 CAZ 11 VINT CREF+ 6 CREF 1.0mf ROSC 430k 61 CREF- 7 OSC1 13 1M 62 HOLD TC826 1M 63 12 TEST VSS VDD 8 OSC2 14 15 BP 59 OR REF ANALOG BAR 0IN COMMON -IN +IN BAR 40 POLSegment Drive 5 2 4 3 60 Backplane 9V R1 R2 -IN +IN BAR 15 BAR 1 BAR 2 BAR 3 BAR 4 BAR 5 BAR 6 BAR 7 BAR 8 BAR 9 NC Component RINT CINT CREF CAZ 2V Full Scale 2M 0.033mf 1mf 0.068mf 200mV Full Scale 20k 0.033mf 1mf 0.068mf 20mV Full Scale 20k 0.033mf 1mf 0.014mf 41 Segment LCD Bar Graph - OR R1 + R2 = 250k (c) DS21477B-page 2 2002 Microchip Technology Inc. TC826 1.0 ELECTRICAL CHARACTERISTICS *Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operation sections of the specifications is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings* Supply Voltage (V+ to V-)....................................... 15V Analog Input Voltage (Either Input) (Note 1)... V+ to VPower Dissipation (TA 70C) 64-Pin Plastic Flat Package ............................... 1.14W Operating Temperature Range: Commercial Package (C) ........................ 0C to +70C Storage Temperature Range .............. -65C to +150C TC826 ELECTRICAL SPECIFICATIONS Electrical Characteristics: V S = 9V; R OSC = 430k; TA = 25C; Full Scale = 20mV, unless otherwise stated. Symbol Zero Input Zero Reading Drift NL R/O EN ILK CMRR Linearity Error Rollover Error Noise Input Leakage Current Common Mode Rejection Ratio Scale Factor Temperature Coefficient Parameter Min -0 -- -1 -1 -- -- -- -- Typ 0 0.2 0.5 0 60 10 50 1 Max +0 1 +1 +1 -- 20 -- -- Unit Display V/C Count Count VP-P pA V/V ppm/C VIN = 0.0V VIN = 0.0V 0C TA +70C Max Deviation from Best Straight Line -VIN = +VIN VIN = 0V VIN = 0V VCM = 1V VIN = 0V 0 TA 7 +0C External Ref. Temperature Coefficient = 0ppm/C 250k between Common and V+, 0C TA +70C 250k between Common and VDD Test Conditions VCTC VCOM VSD VBD IDD Analog Common Temperature Coefficient Analog Common Voltage LCD Segment Drive Voltage LCD Backplane Drive Voltage Power Supply Current -- 2.7 4 4 -- 35 2.9 5 5 125 100 3.35 6 6 175 ppm/C V VP-P VP-P A Note 1: Input voltages may exceed the supply voltages when the input current is limited to 100A. 2: Static sensitive device. Unused devices should be stored in conductive material to protect devices from static discharge and static fields. 3: Backplane drive is in phase with segment drive for `off' segment and 180C out of phase for `on' segment. Frequency is 10 times conversion rate. 4: Logic input pins 58, 59, and 60 should be connected through 1M series resistors to VSS for logic 0. 2002 Microchip Technology Inc. DS21477B-page 3 (c) TC826 2.0 PIN DESCRIPTION The descriptions of the pins are listed in Table 2-1. TABLE 2-1: Pin Number (64-Pin PQFP) 1 2 PIN FUNCTION TABLE Symbol NC ANALOG COMMON Positive analog signal input. Establishes the internal analog ground point. Analog common is set to 2.9V below the positive supply COMMON by an internal zener reference circuit. The voltage difference between VDD and analog common can be used to supply the TC826 voltage reference input at REF IN (Pin 5). Positive analog signal input. Negative analog signal input. Reference voltage positive input. Measured relative to analog common. REF IN Full Scale/2. Reference capacitor connection. Reference capacitor connection. Positive supply terminal. Buffer output. Integration resistor connection. Negative comparator input. Auto-zero capacitor connection. Integrator output. Integration capacitor connection. Negative supply terminal. Oscillator resistor (ROSC ) connection. Oscillator resistor (ROSC ) connection. LCD Backplane driver. LCD Segment driver: Bar 0. No connection. LCD Segment driver: Bar 1. LCD Segment driver: Bar 2. LCD Segment driver: Bar 3. LCD Segment driver: Bar 4. LCD Segment driver: Bar 5. LCD Segment driver: Bar 6. LCD Segment driver: Bar 7. LCD Segment driver: Bar 8. LCD Segment driver: Bar 9. LCD Segment driver: Bar 10. LCD Segment driver: Bar 11. LCD Segment driver: Bar 12. LCD Segment driver: Bar 13. LCD Segment driver: Bar 14. LCD Segment driver: Bar 15. LCD Segment driver: Bar 16. LCD Segment driver: Bar 17. LCD Segment driver: Bar 18. LCD Segment driver: Bar 19. LCD Segment driver: Bar 20. LCD Segment driver: Bar 21. LCD Segment driver: Bar 22. LCD Segment driver: Bar 23. Description 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 +IN -IN REF IN CREF+ CREFVDD VBUF CAZ VINT VSS OSC1 OSC2 BP BAR 0 NC BAR 1 BAR 2 BAR 3 BAR 4 BAR 5 BAR 6 BAR 7 BAR 8 BAR 9 BAR 10 BAR 11 BAR 12 BAR 13 BAR 14 BAR 15 BAR 16 BAR 17 BAR 18 BAR 19 BAR 20 BAR 21 BAR 22 BAR 23 (c) DS21477B-page 4 2002 Microchip Technology Inc. TC826 TABLE 2-1: Pin Number (64-Pin PQFP) 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 PIN FUNCTION TABLE (CONTINUED) Symbol BAR 24 BAR 25 BAR 26 BAR 27 BAR 28 BAR 29 BAR 30 NC BAR 31 BAR 32 BAR 33 BAR 34 BAR 35 BAR 36 BAR 37 BAR 38 BAR 39 BAR 40 OR POLBAR/DOT HOLD TEST LCD Segment driver: Bar 24. LCD Segment driver: Bar 25. LCD Segment driver: Bar 26. LCD Segment driver: Bar 27. LCD Segment driver: Bar 28. LCD Segment driver: Bar 29. LCD Segment driver: Bar 30. No connection. LCD Segment driver: Bar 31. LCD Segment driver: Bar 32. LCD Segment driver: Bar 33. LCD Segment driver: Bar 34. LCD Segment driver: Bar 35. LCD Segment driver: Bar 36. LCD Segment driver: Bar 37. LCD Segment driver: Bar 38. LCD Segment driver: Bar 39. LCD Segment driver: Bar 40. LCD segment driver that indicated input out-of-range condition. LCD segment driver that indicates input signal is negative. Input logic signal that selects BAR or DOT display format. Normally in BAR mode. Connect to VSS through 1M resistor for DOT format. Input logic signal that prevents display from changing. Pulled high internally to inactive state. Connect to VSS through 1M series resistor for HOLD mode operation. Input logic signal. Sets TC826 to BAR Display mode. BAR 0 to 40, plus OR flash on and off. The POL- LCD driver is on. Pulled high internally to inactive state. Connect to VSS with 1M series resistor to activate. No connection. Description 64 NC 2002 Microchip Technology Inc. DS21477B-page 5 (c) TC826 3.0 3.1 DETAILED DESCRIPTION Dual Slope Conversion Principles A simple mathematical equation relates the input signal reference voltage and integration time: * Input Signal Integration * Reference Voltage Integration (De-integration) The input signal being converted is integrated for a fixed time period (TSI). Time is measured by counting clock pulses. An opposite polarity constant reference voltage is then integrated until the integrator output voltage returns to zero. The reference integration time is directly proportional to the input signal (TRI) (Figure 3-1). In a simple dual slope converter, a complete conversion requires the integrator output to `ramp-up' and `ramp-down'. Where: VR = Reference Voltage VSI = Signal Integration Time (Fixed) TRI = Reference Voltage Integration Time (Variable) FIGURE 3-1: BASIC DUAL SLOPE CONVERTER C Integrator - - + +/- + Phase Control Control Logic Clock Comparator R Analog Input Signal REF Voltage Switch Driver Polarity Control Integrator Output VIN 1/2 VFULL SCALE VIN 1/4 VFULL SCALE Fixed Signal Integrate Time Variable Reference Integrate Time (c) DS21477B-page 6 The TC826 is a dual slope, integrating analog-to-digital converter. The conventional dual slope converter measurement cycle has two distinct phases: EQUATION 3-1: 1 RC tINT VT VIN(t)dt = R RI 0 RC Counter Display 2002 Microchip Technology Inc. TC826 For a constant VIN: FIGURE 3-2: EQUATION 3-2: VIN = V R TRI TSI Normal Mode Rejection (dB) 30 NORMAL MODE REJECTION OF DUAL SLOPE CONVERTER T = Measurement Period 20 The dual slope converter accuracy is unrelated to the integrating resistor and capacitor values, as long as they are stable during a measurement cycle. An inherent benefit is noise immunity. Noise spikes are integrated or averaged to zero during the integration periods. Integrating ADCs are immune to the large conversion errors that plague successive approximation converters in high noise environments. Interfering signals with frequency components at multiples of the averaging period will be attenuated (Figure 3-2). The TC826 converter improves the conventional dual slope conversion technique by incorporating an autozero phase. This phase eliminates zero scale offset errors and drift. A potentiometer is not required to obtain a zero output for zero input. 10 0 0.1/T 1/T Input Frequency 10/T 2002 Microchip Technology Inc. DS21477B-page 7 (c) TC826 4.0 4.1 THEORY OF OPERATION Analog Section The auto-zero cycle length is 19 counts minimum. Unused time in the de-integrate cycle is added to the auto-zero cycle. In addition to the basic signal integrate and deintegrate cycles discussed above, the TC826 incorporates an auto-zero cycle.This cycle removes buffer amplifier, integrator, and comparator offset voltage error terms from the conversion. A true digital zero reading results without external adjusting potentiometers. A complete conversion consists of three cycles: an auto-zero, signal integrate and reference cycle (Figure 4-1 and Figure 4-2). 4.1.2 SIGNAL INTEGRATION CYCLE The auto-zero loop is opened and the internal differential inputs connect to +IN and -IN. The differential input signal is integrated for a fixed time period. The TC826 signal integration period is 20 clock periods or counts. The externally set clock frequency is divided by 32 before clocking the internal counters. The integration time period is: 4.1.1 AUTO-ZERO CYCLE EQUATION 4-1: Where: TSI = 32 FOSC x 20 During the auto-zero cycle, the differential input signal is disconnected from the circuit by opening internal analog gates. The internal nodes are shorted to analog common (internal analog ground) to establish a zero input condition. Additional analog gates close a feedback loop around the offset voltage error compensation. The voltage level established on CAZ compensates for device offset voltages. FOSC = External Clock Frequency FIGURE 4-1: TC826 ANALOG SECTION RINT REF IN 5 6 CREF 7 9 CAZ 10 CINT 11 VDD 8 AZ TC826 Integrator - - + + + CMPTR +Input 3 INT DEAZ DE+ To Digital Section Buffer - Comparator AZ AZ Analog Common -INPUT 2 DE+ DEINT INT VDD VDD 6.3V 1A 4 From Digital Control Center AZ INT DE+ DE- VDD - 2.9V - + Analog Switch 12 VDD (c) DS21477B-page 8 2002 Microchip Technology Inc. TC826 The differential input voltage must be within the device Common mode range when the converter and measured system share the same power supply common (ground). If the converter and measured system do not share the same power supply common, -IN should be tied to analog common. This is the usual connection for battery operated systems. Polarity is determined at the end of signal integrate signal phase. The sign bit is a true polarity indication, in that signals less than 1LSB are correctly determined. This allows precision null detection limited only by device noise and system noise. 4.1.3 REFERENCE INTEGRATE CYCLE The final phase is reference integrate or de-integrate. -IN is internally connected to analog common and +IN is connected with the correct polarity to cause the integrator output to return to zero. The time required for the output to return to zero is proportional to the input signal and is between 0 and 40 counts. The digital reading displayed is: EQUATION 4-2: VIN 20 = V REF FIGURE 4-2: CONVERSION HAS THREE PHASES Auto-Zero Phase (AZ) Signal Integrate Phase (SI) Reference Integrate Phase (RI) (De-integrate) Sign Bit Determined Integrator Output Analog Common Potential True Zero Crossing Internal System Clock (FSYS) Internal Data Latch Update Signal Zero Crossing Detected Number of Counts Proportional to VIN TI 19 Counts Minimum 20 Counts TD VIN 41 Counts Maximum (TCONV = 80 X One Conversion Cycle = 80 Counts 1 ) FSYS 2002 Microchip Technology Inc. DS21477B-page 9 (c) TC826 4.2 System Timing 4.4 4.4.1 Components Value Selection INTEGRATING RESISTOR (RINT) The oscillator frequency is divided by 32 prior to clocking the internal counters. The three-phase measurement cycle takes a total of 80 clock pulses. The 80 count cycle is independent of input signal magnitude. Each phase of the measurement cycle has the following length: * Auto-Zero Phase: 19 to 59 Counts For signals less than full scale, the auto-zero is assigned the unused reference integrate time period. * Signal Integrate: 20 Counts This time period is fixed. The integration period is: The desired full scale input voltage and output current capability of the input buffer and integrator amplifier set the integration resistor value. The internal class A output stage amplifiers will supply a 1A drive current with minimal linearity error. RINT is easily calculated for a 1A full scale current: EQUATION 4-4: RINT = VFS Full Scale Voltage(V) = 1 x 10 - 6 1 x 10 - 6 EQUATION 4-3: Where VFS = Full Scale Analog Input 32 TSI = 20 FOSC 4.4.2 INTEGRATING CAPACITOR (CINT) Where FOSC is the externally set clock frequency. * Reference Integrate: 0 to 41 Counts The integrating capacitor should be selected to maximize integrator output swing. The integrator output will swing to within 0.4V of VS+ or VS- without saturating. The integrating capacitor is easily calculated: 4.3 Reference Voltage Selection TABLE 4-1: Required Full Scale Voltage 20mV 2V VREF 10mV 1V Where: VINT = Integrator Swing FOSC = Oscillator Frequency The integrating capacitor should be selected for low dielectric absorption to prevent rollover errors. Polypropylene capacitors are suggested. The internal voltage reference potential available at analog common will normally be used to supply the converter's reference. This potential is stable whenever the supply potential is greater than approximately 7V. In applications where an externally generated reference voltage is desired, refer to Figure 4-3. The reference voltage is adjusted with a near full scale input signal. Adjust for proper LCD display read out. 4.4.3 AUTO-ZERO CAPACITOR (CAZ) C AZ should be 2-3 times larger than the integration capacitor. A polypropylene capacitor is suggested. Typical values from 0.14F to 0.068F are satisfactory. 4.4.4 REFERENCE CAPACITOR (CREF) FIGURE 4-3: EXTERNAL REFERENCE V+ A 1F capacitor is suggested. Low leakage capacitors, such as polypropylene, are recommended. Several capacitor/resistor combinations for common full scale input conditions are given in Table 4-2. 8 V+ TC826 REF IN ANALOG COMMON (b) 5 2 MCP1525 1F 2.50V Reference (c) DS21477B-page 10 2002 Microchip Technology Inc. CINT = RINT A full scale reading requires the input signal be twice the reference voltage. The reference potential is measured between REF IN (Pin 5) and ANALOG COMMON (Pin 2). EQUATION 4-5: VFS 640 FOSC x VINT TC826 TABLE 4-2: SUGGESTED COMPONENT VALUES 2V Full Scale VREF 1V 2M 0.033F 1F 0.068F 430k 2mV Full Scale VREF 100V 200k 0.033F 1F 0.068F 430k 20mV Full Scale VREF 10V 20k 0.033F 1F 1.14F 430k -2 -1 -0.5 0 0.5 1 2 3 39 39.5 40 40.5 Analog Input V (X FS ) 40 FIGURE 4-4: 40 Digital Display 39 2 1 TRANSFER FUNCTION Over Range Indication Comp. RINT CINT CREF CAZ R OSC Note: Approximately 5 conversions/second. 4.5 Differential Signal Inputs 4.7 The TC826 is designed with true differential inputs and accepts input signals within the input stage Common mode voltage range (VCM). The typical range is V+ -1 to V- +1V. Common mode voltages are removed from the system when the TC826 operates from a battery or floating power source (isolated from measured system) and -IN is connected to analog common (V COM). In systems where Common mode rejection ratio minimizes error. Common mode voltages do, however, affect the integrator output level. Integrator output saturation must be prevented. A worse case condition exists if a large positive VCM exists in conjunction with a full scale negative differential signal. The negative signal drives the integrator output positive along with VCM. For such applications, the integrator output swing can be reduced below the recommended 2V full scale swing. The integrator output will swing within 0.3V of VDD or VSS without increased linearity error. BAR/DOT Input (Pin 61) The BAR/DOT input allows the user to select the display format. The TC826 powers up in the BAR mode. Select the DOT display format by connecting BAR/DOT to the negative supply (Pin 12) through a 1M resistor. 4.8 HOLD Input (Pin 62) The TC826 data output latches are not updated at the end of each conversion if HOLD is tied to the negative supply (Pin 12) through a 1M resistor. The LCD display continuously displays the previous conversion results. The HOLD pin is normally pulled high by an internal pull-up. 4.9 TEST Input (Pin 63) 4.6 Digital Section The TC826 contains all the segment drivers necessary to drive a liquid crystal display (LCD). An LCD backplane driver is included. The backplane frequency is the external clock frequency divided by 256. A 430k OSC gets the backplane frequency to approximately 55Hz, with a 5V nominal amplitude. When a segment driver is in phase with the backplane signal, the segment is `OFF'. An out-of-phase segment drive signal causes the segment to be `ON' or visible. This AC drive configuration results in negligible DC voltage across each LCD segment. This insures long LCD display life. The polarity segment drive, -POL, is `ON' for negative analog inputs. If +IN and -IN are reversed, this indicator would reverse. The TC826 transfer function is shown in Figure 4-4. The TC826 enters a Test mode with the TEST input connected to the negative supply (Pin 12). The connection must be made through a 1M resistor. The TEST input is normally internally pulled high. A low input sets the output data latch to all ones. The BAR Display mode is set. The 41 LCD output segments (zero plus 40 data segments) and over range annunciator flash on and off at 1/4 the conversion rate. The polarity annunciator (POL-) segment will be on, but not flashing. 4.10 Over Range Display Operation (OR, Pin 59) An out-of-range input signal will be indicated on the LCD display by the OR annunciator driver (Pin 59) becoming active. In the BAR display format, the 41 bar segments and the over range annunciator, OR, will flash ON and OFF. The flash rate is on fourth the conversion rate (FOSC/2560). In the DOT Display mode, OR flashes and all other data segment drivers are off. 2002 Microchip Technology Inc. DS21477B-page 11 (c) TC826 4.11 Polarity Indication (POL-, Pin 60) FIGURE 4-6: The TC826 converts and displays data for positive and negative input signals. The POL LCD segment driver (Pin 60) is active for negative signals. EXTERNAL OSCILLATOR CONNECTION 8 TC826 12 13 OSC1 14 OSC2 4.12 Oscillator Operation 9V The TC826 external oscillator frequency, FOSC, is set by resistor ROSC connected between pins 13 and 14. The oscillator frequency versus resistance curve is shown in Figure 4-5. 0.1f FIGURE 4-5: 50 40 20 18 OSCILLATOR FREQUENCY VS. ROSC TA = 25C VDD to VSS = 9V External Oscillator CONV (CONV/SEC) 16 14 12 10 8 6 4 2 0 0 A. Single 9V Supply VDD = 5V VDD 8 13 0.1f VSS 12 Power Supply FOSC (kHz) 30 20 10 0 TC826 Oscillator 2 4 6 8 10 12 14 16 18 20 ROSC (X 100k) B. Dual Supply VSS = 5V 4.13 FOSC is divided by 32 to provide an internal system clock, FYSY. Each conversion requires 80 internal clock cycles. The internal system clock is divided by 8 to provide the LCD backplane drive frequency. The display flash rate during an input out-of-range signal is set by dividing FSYS by 320. The internal oscillator may be bypassed by driving OSC1 (Pin 13) with an external signal generator. OSC2 (Pin 14) should be left unconnected. The oscillator should swing from VDD to VSS in single supply operation (Figure 4-6). In dual supply operation, the signal should swing from power supply ground to VDD. LCD Display Format The input signal can be displayed in two formats (Figure 4-7). The BAR/DOT input (Pin 61) selects the format. The TC826 measurement cycle operates identically for either mode. FIGURE 4-7: A. BAR Mode 1. Input = 0 Bar 4 Bar 3 Bar 2 Bar 1 Bar 0 B. DOT Mode 1. Input = 0 Bar 4 Bar 3 Bar 2 Bar 1 Bar 0 DISPLAY OPTION FORMATS 2. Input = 5% of Full Scale Off Off Off Off On Off Off On On On 2. Input = 5% of Full Scale Off Off Off Off On Off Off On Off Off (c) DS21477B-page 12 2002 Microchip Technology Inc. TC826 4.14 BAR Format 4.17 LCD Backplane Driver (BP, Pin 15) The TC826 powers up in the BAR mode. BAR/DOT is pulled high internally. This display format is similar to a thermometer display. All bars/LCD segments including zero, below the bar/LCD segment equaling the input signal level, are on. A half scale input signal, for example, would be displayed with BAR 0 to BAR 20 on. Additional drive electronics are not required to interface the TC826 to an LCD display. The TC826 has an onchip backplane generator and driver. The backplane frequency is: FBP = FOSC/256 Figure 4-8 gives typical backplane driver rise/fall time versus backplane capacitance. 4.15 DOT Format By connecting BAR/DOT to VSS through a 1M resistor, the DOT mode is selected. Only the BAR LCD segment equaling the input signal is on. The zero segment is on for zero input. This mode is useful for moving cursor or `needle' applications. FIGURE 4-8: BACKPLANE DRIVE RISE/ FALL TIME VS. CAPACITANCE 10 9 4.16 LCD Displays Rise/Fall Time (X 100ns) 8 7 6 5 4 3 2 1 0 TA = 25C VS = 9V Most end products will use a custom LCD display for final production. Custom LCD displays are low cost and available from all manufacturers. The TC826 interfaces to non-multiplexed LCD displays. A backplane driver is included on-chip. To speed initial evaluation and prototype work, a standard TC826 LCD display is available from Varitronix. Varitronix Ltd. LCDs 4/F Liven House 61-63 King Yip Street Kwun Tong, Kowloon Hong Kong Tel: (852)2389-4317 Fax: (852)2343-9555 USA Office: VL Electronics / Varitronix 3250 Wilshire Blvd., Suite 901 Los Angeles, CA 90010 Tel: (213) 738-8700 Fax: (213) 738-5340 * Part No.: VBG-413-DP Other standard LCD displays suitable for development work are available in both linear and circular formats. One manufacturer is: UCE Inc. 24 Fitch Street Norwalk, CT 06855 Tel: 203/838-7509 * Part No. 5040: 50 segment circular display with 3-digit numeric scale. * Part No. 5020: 50 segment linear display. 1 2 3 4 5 6 7 8 0 10 Backplane Capacitance (X 100pf) 4.18 Flat Package Socket Sockets suitable for prototype work are available. A USA source is: Nepenthe Distribution 2471 East Bayshore, Suite 520 Palo Alto, CA 94303 Tel: 415/856-9332 Telex: 910/373-2060 * `BQ' Socket Part No.: IC51-064-042 BQ 2002 Microchip Technology Inc. DS21477B-page 13 (c) TC826 5.0 5.1 PACKAGING INFORMATION Package Marking Information Package marking data not available at this time. 5.2 Taping Form Component Taping Orientation for 64-Pin PQFP Devices User Direction of Feed PIN 1 W P Standard Reel Component Orientation for TR Suffix Device Carrier Tape, Number of Components Per Reel and Reel Size Package Carrier Width (W) Pitch (P) Part Per Full Reel Reel Size 64-Pin PQFP 32 mm 24 mm 250 13 in Note: Drawing does not represent total number of pins. 5.3 Package Dimensions 64-Pin PQFP PIN 1 .018 (0.45) .012 (0.30) .009 (0.23) .005 (0.13) 7 MAX. .041 (1.03) .031 (0.78) .555 (14.10) .547 (13.90) .687 (17.45) .667 (16.95) .031 (0.80) TYP. .555 (14.10) .547 (13.90) .687 (17.45) .667 (16.95) .010 (0.25) TYP. .120 (3.05) .100 (2.55) .130 (3.30) MAX. Dimensions: mm (inches) (c) DS21477B-page 14 2002 Microchip Technology Inc. TC826 NOTES: 2002 Microchip Technology Inc. DS21477B-page 15 (c) TC826 SALES AND SUPPORT Data Sheets Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following: 1. 2. 3. Your local Microchip sales office The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277 The Microchip Worldwide Site (www.microchip.com) Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using. New Customer Notification System Register on our web site (www.microchip.com/cn) to receive the most current information on our products. (c) DS21477B-page 16 2002 Microchip Technology Inc. TC826 Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. No representation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip's products as critical components in life support systems is not authorized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, FilterLab, KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM, MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. Serialized Quick Turn Programming (SQTP) is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2002, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received QS-9000 quality system certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona in July 1999 and Mountain View, California in March 2002. The Company's quality system processes and procedures are QS-9000 compliant for its PICmicro (R) 8-bit MCUs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, non-volatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001 certified. 2002 Microchip Technology Inc. DS21477B-page 17 (c) WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: 480-792-7627 Web Address: http://www.microchip.com ASIA/PACIFIC Australia Microchip Technology Australia Pty Ltd Suite 22, 41 Rawson Street Epping 2121, NSW Australia Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 Japan Microchip Technology Japan K.K. Benex S-1 6F 3-18-20, Shinyokohama Kohoku-Ku, Yokohama-shi Kanagawa, 222-0033, Japan Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Rocky Mountain 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7966 Fax: 480-792-7456 China - Beijing Microchip Technology Consulting (Shanghai) Co., Ltd., Beijing Liaison Office Unit 915 Bei Hai Wan Tai Bldg. No. 6 Chaoyangmen Beidajie Beijing, 100027, No. China Tel: 86-10-85282100 Fax: 86-10-85282104 Korea Microchip Technology Korea 168-1, Youngbo Bldg. 3 Floor Samsung-Dong, Kangnam-Ku Seoul, Korea 135-882 Tel: 82-2-554-7200 Fax: 82-2-558-5934 Atlanta 500 Sugar Mill Road, Suite 200B Atlanta, GA 30350 Tel: 770-640-0034 Fax: 770-640-0307 Singapore Microchip Technology Singapore Pte Ltd. 200 Middle Road #07-02 Prime Centre Singapore, 188980 Tel: 65-6334-8870 Fax: 65-6334-8850 Boston 2 Lan Drive, Suite 120 Westford, MA 01886 Tel: 978-692-3848 Fax: 978-692-3821 China - Chengdu Microchip Technology Consulting (Shanghai) Co., Ltd., Chengdu Liaison Office Rm. 2401, 24th Floor, Ming Xing Financial Tower No. 88 TIDU Street Chengdu 610016, China Tel: 86-28-6766200 Fax: 86-28-6766599 Taiwan Microchip Technology Taiwan 11F-3, No. 207 Tung Hua North Road Taipei, 105, Taiwan Tel: 886-2-2717-7175 Fax: 886-2-2545-0139 Chicago 333 Pierce Road, Suite 180 Itasca, IL 60143 Tel: 630-285-0071 Fax: 630-285-0075 Dallas 4570 Westgrove Drive, Suite 160 Addison, TX 75001 Tel: 972-818-7423 Fax: 972-818-2924 China - Fuzhou Microchip Technology Consulting (Shanghai) Co., Ltd., Fuzhou Liaison Office Unit 28F, World Trade Plaza No. 71 Wusi Road Fuzhou 350001, China Tel: 86-591-7503506 Fax: 86-591-7503521 EUROPE Denmark Microchip Technology Nordic ApS Regus Business Centre Lautrup hoj 1-3 Ballerup DK-2750 Denmark Tel: 45 4420 9895 Fax: 45 4420 9910 Detroit Tri-Atria Office Building 32255 Northwestern Highway, Suite 190 Farmington Hills, MI 48334 Tel: 248-538-2250 Fax: 248-538-2260 China - Shanghai Microchip Technology Consulting (Shanghai) Co., Ltd. Room 701, Bldg. B Far East International Plaza No. 317 Xian Xia Road Shanghai, 200051 Tel: 86-21-6275-5700 Fax: 86-21-6275-5060 Kokomo 2767 S. Albright Road Kokomo, Indiana 46902 Tel: 765-864-8360 Fax: 765-864-8387 France Microchip Technology SARL Parc d'Activite du Moulin de Massy 43 Rue du Saule Trapu Batiment A - ler Etage 91300 Massy, France Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Los Angeles 18201 Von Karman, Suite 1090 Irvine, CA 92612 Tel: 949-263-1888 Fax: 949-263-1338 China - Shenzhen Microchip Technology Consulting (Shanghai) Co., Ltd., Shenzhen Liaison Office Rm. 1315, 13/F, Shenzhen Kerry Centre, Renminnan Lu Shenzhen 518001, China Tel: 86-755-2350361 Fax: 86-755-2366086 New York 150 Motor Parkway, Suite 202 Hauppauge, NY 11788 Tel: 631-273-5305 Fax: 631-273-5335 Germany Microchip Technology GmbH Gustav-Heinemann Ring 125 D-81739 Munich, Germany Tel: 49-89-627-144 0 Fax: 49-89-627-144-44 San Jose Microchip Technology Inc. 2107 North First Street, Suite 590 San Jose, CA 95131 Tel: 408-436-7950 Fax: 408-436-7955 Hong Kong Microchip Technology Hongkong Ltd. Unit 901-6, Tower 2, Metroplaza 223 Hing Fong Road Kwai Fong, N.T., Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Italy Microchip Technology SRL Centro Direzionale Colleoni Palazzo Taurus 1 V. Le Colleoni 1 20041 Agrate Brianza Milan, Italy Tel: 39-039-65791-1 Fax: 39-039-6899883 Toronto 6285 Northam Drive, Suite 108 Mississauga, Ontario L4V 1X5, Canada Tel: 905-673-0699 Fax: 905-673-6509 India Microchip Technology Inc. India Liaison Office Divyasree Chambers 1 Floor, Wing A (A3/A4) No. 11, O'Shaugnessey Road Bangalore, 560 025, India Tel: 91-80-2290061 Fax: 91-80-2290062 United Kingdom Arizona Microchip Technology Ltd. 505 Eskdale Road Winnersh Triangle Wokingham Berkshire, England RG41 5TU Tel: 44 118 921 5869 Fax: 44-118 921-5820 03/01/02 (c) DS21477B-page 18 2002 Microchip Technology Inc. *B77412SD* |
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